Low - Power Aspects of Different Adder Topologies
نویسندگان
چکیده
This paper explores different adder topologies for low power solutions. Furfher. we look at the energy optimization of circuits wing tramistor suing technique based on Logical Eflort. The efticienq of the method is verified on representative 16-bit adders, comnioitly found blocks in general purpose DSP processors. The results are shown and analyzed in the Energy-Delq space.
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